arm64

package
v0.0.0-...-894a522 Latest Latest
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 Go to latest Published: Sep 22, 2025 License: MIT Imports: 5 Imported by: 0

Documentation

Overview

The theoretical proof behind it is still not very clear.

Index

Constants

This section is empty.

Variables

This section is empty.

Functions

func AESE 

func AESE(rk, state *Vector128)

func EIA16Bytes 

func EIA16Bytes(data []byte, keys []uint32) uint32

func Encrypt 

func Encrypt(out, in []byte, enc *[32]uint32)

func ExpandKey 

func ExpandKey(out []uint32, key []byte)

func GenLookupTable 

func GenLookupTable(m uint64, c byte, ltl, lth *Vector128)

func NewClmulARM64Ghash 

func NewClmulARM64Ghash(h []byte) *clmulARM64Ghash

func PRE_TRANSPOSE_S 

func PRE_TRANSPOSE_S(t0, t1, t2, t3 *Vector128)

input: from high to low t0 = t0.S3, t0.S2, t0.S1, t0.S0 t1 = t1.S3, t1.S2, t1.S1, t1.S0 t2 = t2.S3, t2.S2, t2.S1, t2.S0 t3 = t3.S3, t3.S2, t3.S1, t3.S0 output: from high to low t0 = t3.S0, t2.S0, t1.S0, t0.S0 t1 = t3.S1, t2.S1, t1.S1, t0.S1 t2 = t3.S2, t2.S2, t1.S2, t0.S2 t3 = t3.S3, t2.S3, t1.S3, t0.S3

func PRE_TRANSPOSE_S2 

func PRE_TRANSPOSE_S2(t0, t1, t2, t3 *Vector128)

Transpose Matrix with VTRN1/3

func SM3PARTW1 

func SM3PARTW1(Vm, Vn, Vd *Vector128)

https://developer.arm.com/documentation/ddi0602/2024-09/SIMD-FP-Instructions/SM3PARTW1--SM3PARTW1-?lang=en

func SM3PARTW2 

func SM3PARTW2(Vm, Vn, Vd *Vector128)

https://developer.arm.com/documentation/ddi0602/2024-09/SIMD-FP-Instructions/SM3PARTW2--SM3PARTW2-?lang=en

func SM3SS1 

func SM3SS1(Va, Vm, Vn, Vd *Vector128)

https://developer.arm.com/documentation/ddi0602/2024-09/SIMD-FP-Instructions/SM3SS1--SM3SS1-?lang=en Va.S[3]: place T constant Vm.S[3]: sm3 state word E Vn.S[3]: sm3 state word A

func SM3TT1A 

func SM3TT1A(imm byte, Vm, Vn, Vd *Vector128)

https://developer.arm.com/documentation/ddi0602/2024-09/SIMD-FP-Instructions/SM3TT1A--SM3TT1A-?lang=en Vm: Wj' Vn: SS1 Vd: state

func SM3TT1B 

func SM3TT1B(imm byte, Vm, Vn, Vd *Vector128)

https://developer.arm.com/documentation/ddi0602/2024-09/SIMD-FP-Instructions/SM3TT1B--SM3TT1B-?lang=en Vm: Wj' Vn: SS1 Vd: state

func SM3TT2A 

func SM3TT2A(imm byte, Vm, Vn, Vd *Vector128)

https://developer.arm.com/documentation/ddi0602/2024-09/SIMD-FP-Instructions/SM3TT2A--SM3TT2A-?lang=en Vm: Wj Vn: SS1 Vd: state

func SM3TT2B 

func SM3TT2B(imm byte, Vm, Vn, Vd *Vector128)

https://developer.arm.com/documentation/ddi0602/2024-09/SIMD-FP-Instructions/SM3TT2B--SM3TT2B-?lang=en Vm: Wj Vn: SS1 Vd: state

func SM4E 

func SM4E(Vn, Vd *Vector128)

https://developer.arm.com/documentation/ddi0602/2024-09/SIMD-FP-Instructions/SM4E--SM4-encode-?lang=en SM4E handle 4 round keys Vn: round key Vd: in out data

func SM4EKEY 

func SM4EKEY(Vm, Vn, Vd *Vector128)

https://developer.arm.com/documentation/ddi0602/2024-09/SIMD-FP-Instructions/SM4EKEY--SM4-key-?lang=en Vm: ck Vn: key Vd: result

func SboxWithAESNI 

func SboxWithAESNI(m1l, m1h, m2l, m2h, x *Vector128)

func TRANSPOSE_S 

func TRANSPOSE_S(t0, t1, t2, t3 *Vector128)

input: from high to low t0 = t0.S3, t0.S2, t0.S1, t0.S0 t1 = t1.S3, t1.S2, t1.S1, t1.S0 t2 = t2.S3, t2.S2, t2.S1, t2.S0 t3 = t3.S3, t3.S2, t3.S1, t3.S0 output: from high to low t0 = t0.S0, t1.S0, t2.S0, t3.S0 t1 = t0.S1, t1.S1, t2.S1, t3.S1 t2 = t0.S2, t1.S2, t2.S2, t3.S2 t3 = t0.S3, t1.S3, t2.S3, t3.S3

func TRANSPOSE_S2 

func TRANSPOSE_S2(t0, t1, t2, t3 *Vector128)

Transpose Matrix with VTRN1/3

func UMULL2_B 

func UMULL2_B(Vm, Vn, Vd *Vector128)

func UMULL2_H 

func UMULL2_H(Vm, Vn, Vd *Vector128)

func UMULL_B 

func UMULL_B(Vm, Vn, Vd *Vector128)

https://developer.arm.com/documentation/ddi0596/2021-03/SIMD-FP-Instructions/UMULL--UMULL2--vector---Unsigned-Multiply-long--vector--?lang=en

func UMULL_H 

func UMULL_H(Vm, Vn, Vd *Vector128)

func VADDP_H 

func VADDP_H(Vm, Vn, Vd *Vector128)

Add pairwise (vector) https://developer.arm.com/documentation/ddi0602/2024-09/SIMD-FP-Instructions/ADDP--vector---Add-pairwise--vector--?lang=en

func VADDP_S 

func VADDP_S(Vm, Vn, Vd *Vector128)

func VADD_B 

func VADD_B(src1, src2, dst *Vector128)

https://developer.arm.com/documentation/ddi0602/2024-09/SIMD-FP-Instructions/ADD--vector---Add--vector--?lang=en VADD src1.16B, src2.16B, dst.16B

func VADD_D 

func VADD_D(src1, src2, dst *Vector128)

VADD src1.2D, src2.2D, dst.2D

func VADD_H 

func VADD_H(src1, src2, dst *Vector128)

VADD src1.8H, src2.8H, dst.8H

func VADD_S 

func VADD_S(src1, src2, dst *Vector128)

VADD src1.4S, src2.4S, dst.4S

func VAND 

func VAND(src1, src2, dst *Vector128)

func VCMEQ_B 

func VCMEQ_B(src1, src2, dst *Vector128)

Compare bitwise equal (vector) https://developer.arm.com/documentation/ddi0602/2024-09/SIMD-FP-Instructions/CMEQ--register---Compare-bitwise-equal--vector--?lang=en VCMEQ src1.16B, src2.16B, dst.16B

func VCMGE_B 

func VCMGE_B(src1, src2, dst *Vector128)

Compare signed greater than or equal (vector) https://developer.arm.com/documentation/ddi0602/2024-09/SIMD-FP-Instructions/CMGE--register---Compare-signed-greater-than-or-equal--vector--?lang=en VCMGE src1.16B, src2.16B, dst.16B

func VCMGT_B 

func VCMGT_B(src1, src2, dst *Vector128)

Compare signed greater than (vector) https://developer.arm.com/documentation/ddi0602/2024-09/SIMD-FP-Instructions/CMGT--register---Compare-signed-greater-than--vector--?lang=en VCMGT src1.16B, src2.16B, dst.16B

func VCMHI_B 

func VCMHI_B(eq bool, src1, src2, dst *Vector128)

Compare unsigned Higher (vector). https://developer.arm.com/architectures/instruction-sets/intrinsics/#q=vcgtq_u8 https://developer.arm.com/documentation/ddi0596/2021-03/SIMD-FP-Instructions/CMHI--register---Compare-unsigned-Higher--vector--?lang=en Architectures: v7, A32, A64 VCMHI src1.16B, src2.16B, dst.16B

func VCMHS_B 

func VCMHS_B(src1, src2, dst *Vector128)

Compare unsigned higher or same (vector) https://developer.arm.com/documentation/ddi0602/2024-09/SIMD-FP-Instructions/CMHS--register---Compare-unsigned-higher-or-same--vector--?lang=en VCMHS src1.16B, src2.16B, dst.16B

func VCMTST_B 

func VCMTST_B(Vm, Vn, Vd *Vector128)

Compare bitwise test bits nonzero (vector) https://developer.arm.com/documentation/ddi0602/2024-09/SIMD-FP-Instructions/CMTST--Compare-bitwise-test-bits-nonzero--vector--?lang=en VCMTST src1.16B, src2.16B, dst.16B

func VDUP_BYTE 

func VDUP_BYTE(src byte, dst *Vector128)

func VDUP_S 

func VDUP_S(src uint32, dst *Vector128)

func VEOR 

func VEOR(src1, src2, dst *Vector128)

func VEXT 

func VEXT(imm byte, Vm, Vn, Vd *Vector128)

Extract vector from pair of vectors https://developer.arm.com/documentation/ddi0602/2024-09/SIMD-FP-Instructions/EXT--Extract-vector-from-pair-of-vectors-?lang=en

func VLD1_2D 

func VLD1_2D(v []uint64, dst *Vector128)

func VLD1_4S 

func VLD1_4S(v []uint32, dst *Vector128)

func VLD1_8H 

func VLD1_8H(v []uint16, dst *Vector128)

func VLD1_16B 

func VLD1_16B(rawbytes []byte, dst *Vector128)

func VLD2_16B 

func VLD2_16B(rawbytes []byte, dst1, dst2 *Vector128)

func VLD3_16B 

func VLD3_16B(rawbytes []byte, dst1, dst2, dst3 *Vector128)

func VLD4_16B 

func VLD4_16B(rawbytes []byte, dst1, dst2, dst3, dst4 *Vector128)

vld4q_u8

func VMOV 

func VMOV(src *Vector128, dst *Vector128)

func VMOV_S 

func VMOV_S(src, dst *Vector128, from, to byte)

func VMUL_H 

func VMUL_H(Vm, Vn, Vd *Vector128)

VMUL Vm.16B, Vn.16B, Vd.8H

func VORR 

func VORR(src1, src2, dst *Vector128)

func VPMULL 

func VPMULL(Vm, Vn, Vd *Vector128)

Polynomial multiply long https://developer.arm.com/documentation/ddi0602/2024-09/SIMD-FP-Instructions/PMULL--PMULL2--Polynomial-multiply-long-?lang=en

func VPMULL2 

func VPMULL2(Vm, Vn, Vd *Vector128)

func VREV16 

func VREV16(src, dst *Vector128)

func VREV32_B 

func VREV32_B(src, dst *Vector128)

func VREV64_B 

func VREV64_B(src, dst *Vector128)

func VREV64_S 

func VREV64_S(src, dst *Vector128)

func VSHL_B 

func VSHL_B(imm byte, src, dst *Vector128)

VSHL $imm, src.16B, dst.16B

func VSHL_S 

func VSHL_S(imm byte, src, dst *Vector128)

VSHL $imm, src.4S, dst.4S

func VSLI_B 

func VSLI_B(imm byte, src, dst *Vector128)

Vector Shift Left and Insert VSLI $imm, src.16B, dst.16B

func VSLI_D 

func VSLI_D(imm byte, src, dst *Vector128)

VSLI $imm, src.2D, dst.2D

func VSRI_S 

func VSRI_S(imm byte, src, dst *Vector128)

VSRI $imm, src.4S, dst.4S

func VST1_4S 

func VST1_4S(src *Vector128, dst []uint32)

func VST1_16B 

func VST1_16B(src *Vector128, dst []byte)

func VST2_16B 

func VST2_16B(src1, src2 *Vector128, dst []byte)

func VST3_16B 

func VST3_16B(src1, src2, src3 *Vector128, dst []byte)

func VST4_16B 

func VST4_16B(src1, src2, src3, src4 *Vector128, dst []byte)

func VSUB_B 

func VSUB_B(Vm, Vn, Vd *Vector128)

https://developer.arm.com/documentation/ddi0602/2024-09/SIMD-FP-Instructions/SUB--vector---Subtract--vector--?lang=en VSUB Vm.16B, Vn.16B, Vd.16B

func VSUB_D 

func VSUB_D(Vm, Vn, Vd *Vector128)

VSUB Vm.2D, Vn.2D, Vd.2D

func VSUB_H 

func VSUB_H(Vm, Vn, Vd *Vector128)

VSUB Vm.8H, Vn.8H, Vd.8H

func VSUB_S 

func VSUB_S(Vm, Vn, Vd *Vector128)

VSUB Vm.4S, Vn.4S, Vd.4S

func VTBL_B 

func VTBL_B(src *Vector128, table []*Vector128, dst *Vector128)

Table vector Lookup. https://developer.arm.com/architectures/instruction-sets/intrinsics/#q=vqtbl4q_u8 Architectures: A64

func VTBX_B 

func VTBX_B(src *Vector128, table []*Vector128, dst *Vector128)

Table vector lookup extension. https://developer.arm.com/architectures/instruction-sets/intrinsics/#q=vqtbx4q_u8 Architectures: A64

func VTRN1_D 

func VTRN1_D(Vm, Vn, dst *Vector128)

VTRN1 Vm.2D, Vn.2D, Vd.2D

func VTRN1_H 

func VTRN1_H(Vm, Vn, dst *Vector128)

https://developer.arm.com/documentation/ddi0602/2024-09/SIMD-FP-Instructions/TRN1--Transpose-vectors--primary--?lang=en VTRN1 Vm.8H, Vn.8H, Vd.8H

func VTRN1_S 

func VTRN1_S(Vm, Vn, dst *Vector128)

VTRN1 Vm.4S, Vn.4S, Vd.4S

func VTRN2_D 

func VTRN2_D(Vm, Vn, dst *Vector128)

VTRN2 Vm.2D, Vn.2D, Vd.2D

func VTRN2_H 

func VTRN2_H(Vm, Vn, dst *Vector128)

https://developer.arm.com/documentation/ddi0602/2024-09/SIMD-FP-Instructions/TRN1--Transpose-vectors--primary--?lang=en VTRN2 Vm.8H, Vn.8H, Vd.8H

func VTRN2_S 

func VTRN2_S(Vm, Vn, dst *Vector128)

VTRN2 Vm.4S, Vn.4S, Vd.4S

func VUMAXV_B 

func VUMAXV_B(max bool, src, dst *Vector128)

Unsigned Maximum across Vector. https://developer.arm.com/architectures/instruction-sets/intrinsics/#q=vmaxvq_u8 Architectures: A64

func VUQSUB_B 

func VUQSUB_B(src1, src2, dst *Vector128)

Unsigned saturating Subtract. https://developer.arm.com/architectures/instruction-sets/intrinsics/vqsubq_u8 VUQSUB src1.16B, src2.16B, dst.16B

func VUSHR_B 

func VUSHR_B(imm byte, src, dst *Vector128)

func VUSHR_D 

func VUSHR_D(imm byte, src, dst *Vector128)

func VUSHR_S 

func VUSHR_S(imm byte, src, dst *Vector128)

func VZIP1_D 

func VZIP1_D(Vm, Vn, dst *Vector128)

VZIP1 Vm.2D, Vn.2D, Vd.2D

func VZIP1_S 

func VZIP1_S(Vm, Vn, dst *Vector128)

https://developer.arm.com/architectures/instruction-sets/intrinsics/#q=vzip1q_u32 VZIP1 Vm.4S, Vn.4S, Vd.4S

func VZIP2_D 

func VZIP2_D(Vm, Vn, dst *Vector128)

VZIP2 Vm.2D, Vn.2D, Vd.2D

func VZIP2_S 

func VZIP2_S(Vm, Vn, dst *Vector128)

VZIP2 Vm.4S, Vn.4S, Vd.4S

Types

type Vector128 

type Vector128 struct {
	// contains filtered or unexported fields
}

func (*Vector128) Bytes 

func (m *Vector128) Bytes() []byte

func (*Vector128) Uint16s 

func (m *Vector128) Uint16s() []uint16

func (*Vector128) Uint32s 

func (m *Vector128) Uint32s() []uint32

func (*Vector128) Uint64s 

func (m *Vector128) Uint64s() []uint64

Source Files

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